TPU Silicon Architect, Machine Learning Accelerator
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- Master's degree in Computer Science, Electrical Engineering, related field, or equivalent practical experience.
- 4 years of experience in computer or chip architecture, performance, or compiler.
- Experience with one or more general purpose programming languages, including C/C++ or Python.
- PhD in Computer Science or Electrical Engineering.
- Experience with domain-specific accelerators.
- Experience with distributed/parallel programming.
- Experience with hardware/software co-design for machine learning.
- Experience with simulator development and micro-architecture.
About the job
In this role, you will join a high-impact team to develop the next generation machine learning accelerator architecture for on-device machine learning applications. It will require balancing short and long-term priorities to ensure we deliver on near-term architecture goals while continuing to invest in the longer-term priorities.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
- Define the next generation machine learning accelerator architecture and ISA for on-device machine learning applications.
- Explore various trade-offs of future architecture designs in terms of performance, power, energy, and area.
- Collaborate with compiler engineers to optimize compilation results and extend the compiler infrastructure. Initiate new feature modeling in the architecture simulator.
- Collaborate with researchers and application developers to enable the latest machine learning work and to optimize the performance.
- Work collaboratively with full stack software engineers to partition machine learning workload to selected compute engines to enhance user experiences.
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