Lead CPU RTL Designer
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Poughkeepsie, NY, USA.
Qualifications
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 10 years of experience in logic/RTL design.
- Experience with modern processor microarchitecture and related technologies/algorithms, microarchitecture definition and RTL design.
- Experience with modern high-frequency CPU design implementation results, front-end design, power analysis tools for CPU, and ARM Instruction Set Architecture.
Preferred qualifications:
- Master’s degree or PhD in Electrical Engineering or Computer Science.
- 15 years of experience in semiconductor industry.
- Experience leading a team for part of a processor frontend design, for ARM based modern processors.
- Knowledge of general purpose operating systems such as Linux and Android.
About the job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Develop CPU front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
- Propose performance enhancing microarchitecture features, and work with Architects and Performance teams for trade-off studies. Communicate the pros and cons of microarchitecture enhancements.
- Deliver designs meeting PPA goals with production quality.
- Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance modeling effort.
- Work with the Functional Verification team to ensure production of quality designs, and the physical design team to meet frequency, power, and area goals.
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