Design Verification and SoC Physical Design Sign-off Engineer
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience in silicon closure and chip integration.
- Experience with different physical verification checks (e.g., DRC, LVS, Antenna, ERC, PERC, ESD, etc.).
Preferred qualifications:
- Experience in PnR tools like ICC/Innovus with regards to physical convergence.
- Experience in sign-off PDV tools like PDK Concepts, SVRF, Calibre, and ICV.
- Understanding of high performance designs and advanced technology nodes.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.
Responsibilities
- Develop high performance hardware to enable Google continuous innovations and work with Application Specific Integrated Circuits (ASIC).
- Drive the overall physical convergence for high performance designs, including setting up the physical analysis flows and methodology to achieve a clean by construction design, and working with the implementation engineers for a timely physical convergence.
- Drive the overall sign-off physical convergence for high performance full-chip designs.
- Define the overall physical convergence methodology, plan out the timeline, and work closely with the block owners to achieve physical convergence through systematic fixes and minimal manual effort.
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This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Design Verification and SoC Physical Design Sign-off Engineer" ASU+GSV Summit.