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ASIC Design Verification Engineer

Google

Google

Design
New Taipei City, Taiwan
Posted on Wednesday, May 24, 2023

Google welcomes people with disabilities.


Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Xindian District, New Taipei City, Taiwan; Banqiao District, New Taipei City, Taiwan.

Qualifications

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
  • Experience verifying digital logic at RTL using SystemVerilog for FPGAs or ASICs.
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
  • Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:

  • Master's or PhD degree in Electrical Engineering or Computer Science.
  • 3 years of design verification experience.
  • Experience with image processing, computer vision, and/or machine learning applications.
  • Experience with performance verification of ASICs and ASIC components and experience with ASIC standard interfaces and memory system architecture.
  • Experience prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms.
  • Experience with verification techniques.

About the job

In this role, you will be part of a Research and Development team, and you will build verification components, use constrained-random testing, end-to-end system testing, and verification closure.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using System Verilog and UVM, or formally verify designs with SVA and formal tools.
  • Identify and write coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

At Google, we’re committed to building a workforce that is more representative of the users we serve and creating a culture where everyone feels like they belong. To learn more about our diversity, equity, inclusion commitments and how we’re building belonging, please visit our Belonging page for more information.

We welcome and encourage people who are expecting and/or parents-to-be to apply to this or any other role at Google.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles.