Silicon Architect, Input Output Memory Management Unit
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Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Banqiao District, New Taipei City, Taiwan 220; Xindian District, New Taipei City, Taiwan.
Qualifications
Minimum qualifications:
- Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.
- 3 years of experience in microarchitecture or modeling, or performance analysis.
- Experience in one or more of the following areas such as Input-Output Memory Management Unit (IOMMU), caches, fabrics, Quality of service (QoS), coherent interconnects, memory Systems.
Preferred qualifications:
- Master's or PhD in Computer Science, Electrical Engineering, or a related field.
- Experience designing, implementing, and validating in Input-Output Memory Management Unit (IOMMU), caches, fabrics, Quality of service (QoS), coherent interconnects, and memory systems.
- Experience in SoC system pre-silicon or post-silicon performance analysis and tuning.
- Experience with C or C++.
- Knowledge of Hardware Description Language (HDL) such as System Verilog, Verilog.
About the job
In this role, you will collaborate with hardware and software architects. You will participate in the development of technologies for the System on a Chip (SoC) Platform IP and filing associated patents.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Collaborate with hardware and software architects to define Input-Output Memory Management Unit (IOMMU) architecture and topology for ongoing products and next-generation IOMMUs.
- Interface with security and access-control architects to refine and improve the architecture.
- Coordinate with modeling and performance teams to develop C-models, simulate and analyze performance, power, area tradeoffs.
- Work with Hardware Design, Verification, Emulation and Validation teams to build, test and refine the hardware architecture. Evaluate operating systems, memory and device virtualization.
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