Chipset Power Architect, Devices and Services, Silicon
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering or equivalent practical experience.
- 7 years of experience in power management or low power design/methodology.
- Experience with full product delivery cycle (e.g., definition, architecture, design and implementation, testing, productization).
- Experience with low power architectures and power improvement techniques.
Preferred qualifications:
- Master's degree or PhD in Electronics Engineering, Computer Engineering, Computer Science, with an emphasis on computer architecture, performance, power analysis.
- Experience with System on a Chip (SoC) power modeling and analysis.
- Experience with low power architecture and power optimization techniques (multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling (DVFS)).
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Define and drive low power solutions for Google SoCs to optimize Power-Performance-Area (PPA) under peak current and thermal constraints.
- Guide architecture, design and implementation to achieve power goals, and track power throughout the design cycle.
- Propose and drive power optimizations throughout the design process from concept to mass productization.
- Perform algorithm development, modeling and analysis of various low power approaches.
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Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles.
This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Chipset Power Architect, Devices and Services, Silicon" ASU+GSV Summit.