Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  
• Experience in C++ and Python.
• Experience with analysis of multi-core SoC workload performance.
  
• Experience creating or integrating simulation models of multi-core SoC subsystems at different levels of abstraction (e.g., cycle-accurate and TLM).
  

Preferred qualifications:

• Experience with systemC.
• Experience with SoC cycles in SoC performance modeling and analysis.
  
• Knowledge of caches, mesh fabric, coherency, memory controllers, DRAM, PCIe, CPU, and/or GPU.
  
• Ability to read, debug, and modify RTL and work with design flow, tools, and verilog language.