Minimum qualifications:

• Bachelor’s degree in Electrical Engineering or equivalent practical experience.
  
• 4 years of experience with advanced design, including clock/voltage domain crossing, Design for Testing (DFT), and low power designs.
  
• Experience with System on a Chip (SoC) cycles.
  
• Experience with performance, frequency, and low-power designs.
  

Preferred qualifications:

• Master’s degree in Electrical Engineering, or a related field.
  
• Experience coding with System Verilog and scripting with TCL.
  
• Experience with multiple-cycles of SoC in ASIC design.
  
• Experience with layout verification and design rules.
  
• Experience with VLSI design in SoC.