Minimum qualifications:

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
  
• 10 years of experience in physical design.
  
• Experience in high performance synthesis, PnR and sign-off optimizations.
  
• Experience in sign-off convergence, including STA, electrical checks and physical verification.
  
• Experience in one or more synthesis/PnR tools (e.g., Genus, Innovus, DC, ICC).
  

Preferred qualifications:

• Experience in computer architecture.
  
• Knowledge of Verilog/SystemVerilog.
  
• Understanding of circuit design, device physics and submicron technology.
  
• Excellent scripting skills with languages such as Python, Tcl, and/or Perl.