Minimum qualifications:

• Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
  
• 5 years of experience in physical design.
  
• Experience with PnR/APR, STA, EMIR, and DRC tools/flows working on synthesized designs.
  
• Experience in one or more scripting languages (e.g., Tcl, Python, etc.).

Preferred qualifications:

• Experience with low-power design techniques such as multiple power domains, power switches, level shifting, isolation, and dynamic voltage/frequency scaling using Unified Power Format (UPF).
  
• Experience with advanced Engineering Change Order (ECO) techniques including full layer and metal-only changes.
  
• Experience with synthesis and optimization methodologies.
  
• Experience with Analog and Mixed Signal (AMS/DMS) design integration including custom routing, shielding, and analog macro integration.
  
• Experience working with scaled Complementary Metal Oxide Semiconductor (CMOS) processes (e.g., FinFET).
  
• Knowledge of version control systems such as Git.