Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 12 years of experience in silicon timing closure and chip integration.
• Experience with STA sign-off constraint authoring for full-chip level, tape-out sign-off requirements, checklists, and associated automation.
• Experience in one or more static timing tools: PrimeTime, Tempus, Timing Closure, STA, Timing ECO using Tweaker, Primeclosure, DMSA.

Preferred qualifications:

• Master's degree in Electrical Engineering.
  
• Experience in extraction of design parameters, QoR metrics, and analyzing data trends.
  
• Knowledge of semiconductor device physics and transistor characteristics.