Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
• Experience in ASIC development with Verilog/SystemVerilog, VHDL.
  
• Experience in logic design and debug.
  
• Experience with ASIC design verification, synthesis, timing/power analysis, or DFT.
  

Preferred qualifications:

• Experience with a scripting language such as Python or Perl.
  
• Knowledge of high performance and low power design techniques.
  
• Knowledge of assertion-based formal verification.
  
• Knowledge of SoC architecture.
  
• Knowledge of one of these areas: PCIe, UCIe, DDR, AXI, ARM processors family.