RTL Verification and Test Chip Lead

Google

Google

Mountain View, CA, USA · San Diego, CA, USA
Posted on Friday, February 9, 2024
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: San Diego, CA, USA; Mountain View, CA, USA.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog
  • Experience developing and maintaining verification testbenches, test cases, and test environments
  • Experience with leading the development of SoCs from definition to tapeout
  • Experience working with stakeholders to define goals, set milestones and track progress

Preferred qualifications:

  • Multiple foundries PDK design experience
  • Post-Silicon debug experience with latest process technology nodes
  • Experience with RTL verification of low power CPU, High speed serial IO such as USB, PCIe, DDR
  • Ability to synthesize and write status summaries and reports to executive level
  • Excellent statistical, data analysis, teamwork, and communication skills