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Chipset Power Architect, Devices and Services, Silicon

Google

Google

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IT
Mountain View, CA, USA
Posted on Friday, February 9, 2024

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience in power management or low power design/methodology.
  • Experience with low power architectures and power optimization techniques.
  • Experience with full product delivery cycle (e.g., definition, architecture, design and implementation, testing, productization).

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with SoC power modeling and analysis.
  • Experience with low power architecture and power optimization techniques (multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling (DVFS, AVS)).
  • Familiar with ASIC design flows.

This job is no longer accepting applications

See open jobs at Google.