Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
  
• 5 years of experience in developing stress tests, silicon validation frameworks or related infrastructure.
  
• Experience in programming with C, C++, Python or Perl.

Preferred qualifications:

• Master's degree.
  
• Experience executing tests on emulation platforms and/or FPGA.
  
• Experience with JTAG debuggers (e.g. Lauterbach).
  
• Experience with complex system debug, embedded operating systems, or bare metal programming.
  
• Experience in verifying concurrent features like coherency, fabric stress, and system power mode stress.