Low Power Design Verification Engineer, Silicon
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Bengaluru, Karnataka, India · Karnataka, India
Posted on Monday, February 12, 2024
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 8 years of experience with low power verification and flows.
- Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at subsystem or full-chip level.
- Experience in C/C++ or SystemVerilog based tests and test sequence development.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science.
- Experience with low power coverage closure and power aware simulations.
- Experience with debugging power aware simulations issues during bring-up and verification cycle.
- Knowledge of UPF from the user perspective and low power design strategies and power managers in subsystem or full-chip.
This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Low Power Design Verification Engineer, Silicon" ASU+GSV Summit.