Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.
  
• 3 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
  
• 3 years of experience with verification and SystemVerilog (i.e., SystemVerilog Assertions or functional coverage).
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering.
• Experience verifying digital logic at RTL using SystemVerilog for ASICs.
  
• Experience in power aware verification, gate level simulations, and post silicon bring-up.
  
• Familiarity with ASIC standard interfaces and memory system architecture.