Minimum qualifications:

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
  
• 8 years of experience creating and using verification components and environments in standard verification methodology.
  
• Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs. Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, etc.).
  
• Experience in scripting using Python, Perl, or shell scripts.

Preferred qualifications:

• Master’s degree in Electrical Engineering or Computer Science.
  
• Experience with ARM Instruction Set architecture or processor microarchitecture.
  
• Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).