Formal Verification Engineer
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See open jobs at Google.See open jobs similar to "Formal Verification Engineer" ASU+GSV Summit.Software Engineering
Sunnyvale, CA, USA
Posted on Tuesday, February 13, 2024
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- Experience in verification of designs (e.g., CPUs, networking or peripheral controllers).
Preferred qualifications:
- PhD in Electrical Engineering or Computer Science.
- Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, 360-DV.
- Experience with scripting language.
- Understanding of formal verification algorithms.
- Excellent communication and team management skills.
This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Formal Verification Engineer" ASU+GSV Summit.