Front End CAD/EDA-Methodology Tool Development Engineer, Silicon
Front End CAD/EDA-Methodology Tool Development Engineer, Silicon
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Minimum qualifications:
- Bachelor's degree or equivalent practical experience.
- 8 years of experience in ASIC Chip Design.
- 5 years of experience with hardware electronic design automation tools.
- Experience in Python/C++ programming.
- Experience in writing code and design practices.
Preferred qualifications:
- Experience planning and deploying new tools and flows to users.
- Experience in AI/ML methods for ASIC development.
- Knowledge of chip design processes such as verification, design, and implementation.
- Ability to present and explain novel methods to users.
- Strong programming/software skills like C/C++/Python.
About the job
In this role, you will help deliver products that have a substantive impact on the Technical Infrastructure. You will provide leadership in an innovative and fast-paced environment with a focus on infrastructure for chip design. You'll also lead complex technical projects from the concept/planning stage through execution and closure. You will enable the wider team to deliver designs of different application areas, including ML/AI acceleration by developing tools relying on AI/ML techniques. You will lead end-to-end chip design process improvement projects
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Partner with the Google Deepmind team to incorporate AI/ML techniques in chip design methodology and integrate into development flow.
- Partner with Chip Project teams to influence and standardize methodology across projects and functional areas (e.g., Design, Verification, Emulation, and other front end domain).
- Propose, design, and implement software automation addressing bottlenecks in today's ASIC and SoC EDA flow. Perform or guide technical evaluations of tools and their AI capabilities and drive planning for possible deployment.
- Lead the development of internal software tools and automation efforts, participate in design reviews, and engage in influencing and scheduling trade-off discussions. Collaborate to identify and create strategic opportunities for improved chip design across Google.
- Work directly with a hardware team on projects-prototype and deploy tools to make a positive impact on Google's chip hardware development process.
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