Full Chip CAD Physical Design Verification Engineer
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or a related field, or equivalent practical experience.
- Experience in Electronic Design Automation (EDA) tools and RTL2GDS flows.
- Experience in the semiconductor/EDA industry.
Preferred qualifications:
- Master’s degree in Computer Engineering/Electronics Engineering.
- Experience related to silicon quality or reliability.
About the job
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Demonstrate an understanding of the Register-Transfer Level (RTL)-to-Graphic Data Stream (GDS)II flow, with experience in using Cadence design tools.
- Involve in implementing large, complex system-on-chips (SoCs), subsystems, and sub-wrappers, demonstrate an understanding of associated issues and solutions.
- Possess floorplanning, power grid design, and place-and-route methodologies, with expertise in using Synopsis tools like Floorplan Compiler (FC) and formality.
- Exhibit an understanding of advanced node design (e.g., 5nm and below) and related optimization techniques.
- Possess scripting skills in Synopsis TCL, with expertise in Python.
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Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Full Chip CAD Physical Design Verification Engineer" ASU+GSV Summit.