Display Wafer Fab Metrology Engineer, Raxium

Minimum qualifications:

• Master's degree in Electrical Engineering, Optics, Physics, or a related field, or equivalent practical experience.
• 5 years of experience working directly with and recipe development in semiconductor metrology tools including critical dimension (CD), overlay, profilometer, reflectometer, ellipsometer, laser or white light interferometer, surface defect, scanning electron microscope (SEM), atomic force microscope (AFM).
• Experience with statistical analysis, interpreting data, identifying trends, performing root cause analysis, and making data-driven decisions.

Preferred qualifications:

• Experience working with III-V compound semiconductor and wafer fabrication in manufacturing settings and metrology cassette automation.
• Working knowledge of semiconductor failure analysis (FA) techniques.
• Proficiency in optical characterization and microscopy techniques.
• Ability to learn fast, work independently, and adapt in a fast-paced, changing environment while communicating cross-functionally effectively (e.g., in-person, emails, reports, technical documents).

About the job

As a Display Wafer Fab Metrology Engineer, you will drive metrology learning and techniques for our next-generation display technology. This includes scaling our toolset for volume production as well as deep investigation into characterization tools to both understand and screen displays. This role requires a high level of collaboration with process, yield, integration, device and epi engineering groups and a keen problem-solving approach. This role is fully onsite in Fremont, CA and in wafer fabrication cleanroom environments.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $142,000-$211,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• 
  Aid in the early adoption of best practices in process control by documenting techniques, training technicians and engineers, and continuously improving metrology procedures, fostering a culture of data-driven process optimization.
• Implement best practices for metrology and measurement tool control, including routine calibration programs, Measurement Systems Analysis (MSA), Gage R&R (GRR), and Statistical Process Control (SPC), ensuring data accuracy and reliability.
• Partner with external tool suppliers for new equipment development and improved analytical capabilities, expanding the metrology toolkit for advanced display technologies.
• Develop and sustain both existing and novel wafer fab metrology techniques and tools to drive development for monolithic display technology, focusing on inline quality control, yield improvement, defectivity reduction, manufacturability.
  
• Drive understanding of toolsets and analyses to maximize the value of measurement data while minimizing cycle time impact, ensuring efficient and effective process control.